<efrbr:recordSet xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:efrbr="http://vfrbr.info/efrbr/1.1" xmlns:efrbr-work="http://vfrbr.info/efrbr/1.1/work" xmlns:efrbr-expression="http://vfrbr.info/efrbr/1.1/expression" xmlns:efrbr-manifestation="http://vfrbr.info/efrbr/1.1/manifestation" xmlns:efrbr-person="http://vfrbr.info/efrbr/1.1/person" xmlns:efrbr-corporateBody="http://vfrbr.info/efrbr/1.1/corporateBody" xmlns:efrbr-concept="http://vfrbr.info/efrbr/1.1/concept" xmlns:efrbr-structure="http://vfrbr.info/efrbr/1.1/structure" xmlns:efrbr-responsible="http://vfrbr.info/efrbr/1.1/responsible" xmlns:efrbr-subject="http://vfrbr.info/efrbr/1.1/subject" xmlns:efrbr-other="http://vfrbr.info/efrbr/1.1/other" xsi:schemaLocation="http://vfrbr.info/efrbr/1.1 http://vfrbr.info/schemas/1.1/efrbr.xsd"><efrbr:entities><efrbr-work:work identifier="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089"><efrbr-work:titleOfTheWork>Exploitation of parallel search space evaluation with FPGAs in combinatorial problems: the Eternity II case</efrbr-work:titleOfTheWork></efrbr-work:work><efrbr-expression:expression identifier="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089"><efrbr-expression:titleOfTheExpression>Exploitation of parallel search space evaluation with FPGAs in combinatorial problems: the Eternity II case</efrbr-expression:titleOfTheExpression><efrbr-expression:formOfExpression vocabulary="DIAS:TYPES">
            Δημοσίευση σε Συνέδριο
            Conference Publication
         </efrbr-expression:formOfExpression><efrbr-expression:dateOfExpression type="issued">2015-11-17</efrbr-expression:dateOfExpression><efrbr-expression:dateOfExpression type="published">2011</efrbr-expression:dateOfExpression><efrbr-expression:languageOfExpression vocabulary="iso639-1">en</efrbr-expression:languageOfExpression><efrbr-expression:summarizationOfContent>The Eternity II puzzle is a combinatorial search problem which qualifies as a computational grand challenge. As no known closed form solution exists, its solution is based on exhaustive search, making it an excellent candidate for FPGA-based architectures, in which complex data structures and non-trivial recursion are implemented in hardware. This paper presents such an architecture, which was designed and fully implemented on a Virtex5 FPGA (XUP ML505 board). Despite the serial nature of the recursion, as parallelism can be applied with the initiation of multiple searches, the system shows a measured speedup of 2.6 vs. a high-end multi-core compute server.</efrbr-expression:summarizationOfContent><efrbr-expression:useRestrictionsOnTheExpression type="creative-commons">http://creativecommons.org/licenses/by/4.0/</efrbr-expression:useRestrictionsOnTheExpression><efrbr-expression:note type="page range">264-268</efrbr-expression:note><efrbr-expression:note type="conference name">International Conference on Field Programmable Logic and Applications</efrbr-expression:note></efrbr-expression:expression><efrbr-person:person identifier="http://users.isc.tuc.gr/~pmalakonakis"><efrbr-person:nameOfPerson vocabulary="TUC:LDAP">
            Malakonakis Pavlos
            Μαλακωνακης Παυλος
         </efrbr-person:nameOfPerson></efrbr-person:person><efrbr-person:person identifier="http://users.isc.tuc.gr/~adollas"><efrbr-person:nameOfPerson vocabulary="TUC:LDAP">
            Dollas Apostolos
            Δολλας Αποστολος
         </efrbr-person:nameOfPerson></efrbr-person:person><efrbr-corporateBody:corporateBody identifier="http://www.ieee.org/index.html"><efrbr-corporateBody:nameOfTheCorporateBody vocabulary="S/R:PUBLISHERS">
            Institute of Electrical and Electronics Engineers
         </efrbr-corporateBody:nameOfTheCorporateBody></efrbr-corporateBody:corporateBody><efrbr-concept:concept identifier="http://id.loc.gov/authorities/subjects/sh93009062"><efrbr-concept:termForTheConcept>
            Field programmable logic arrays
            FPGAs
            field programmable gate arrays
            field programmable logic arrays
            fpgas
         </efrbr-concept:termForTheConcept></efrbr-concept:concept></efrbr:entities><efrbr:relationships><efrbr-structure:structureRelations><efrbr-structure:realizedThrough sourceEntity="work" targetEntity="expression" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089"/></efrbr-structure:structureRelations><efrbr-responsible:responsibleRelations><efrbr-responsible:createdBy sourceEntity="work" targetEntity="person" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://users.isc.tuc.gr/~pmalakonakis"/><efrbr-responsible:realizedBy sourceEntity="expression" role="author" targetEntity="person" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://users.isc.tuc.gr/~pmalakonakis"/><efrbr-responsible:realizedBy sourceEntity="expression" role="author" targetEntity="person" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://users.isc.tuc.gr/~adollas"/><efrbr-responsible:realizedBy sourceEntity="expression" role="publisher" targetEntity="person" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://www.ieee.org/index.html"/></efrbr-responsible:responsibleRelations><efrbr-subject:subjectRelations><efrbr-subject:hasSubject sourceEntity="work" targetEntity="concept" sourceURI="http://purl.tuc.gr/dl/dias/B542ED9E-AE92-49F0-94F6-8266DDEFE089" targetURI="http://id.loc.gov/authorities/subjects/sh93009062"/></efrbr-subject:subjectRelations><efrbr-other:otherRelations/></efrbr:relationships></efrbr:recordSet>