Implementing a Run-Time System Manager on partially reconfigurable FPGA systems Implementing a Run-Time System Manager on partially reconfigurable FPGA systems Μεταπτυχιακή Διατριβή Master Thesis 2015-10-272015enThe last few years FPGAs have penetrated the mainstream and have experienced wide usage through the users. Also the concept of reconfigurable computing has benefited numerous application domains, with FPGAs being the stronger representative of that. Partial reconfiguration technology can leverage these systems by swapping in and out task modules in an operating-system fashion. A task can be downloaded upon arrival or when needed, during the system operation. To this direction one of the most important parts of said embedded system is the Run Time System Manager. Despite the fact that, during recent years, many Run Time System Managers have been proposed, very few of them have been implemented on a realistic FPGA system. Moreover due to the vast collection of platforms utilizing reconfigurable logic and their differences the realization of the RTSM on these machines becomes a highly customized process. Thus the RTSM has to be as generic as possible in order to make it easier for the user to implement our RTSM in different reconfigurable platforms. In this thesis we present the design and implementation of an RTSM we have crafted that operates and manages multiple reconfigurable platforms created by different vendors (albeit, all using Xilinx Virtex 5, 6, and Zynq series). We present the difficulties and the design choices we had to make for the realization of our RTSM on each different platform. The RTSM is extended in order to be compared with a high level parallelism model, thus displaying the high generic and customizable fashion of our RTSM. Finally we evaluate our designs with different applications and assess the advantages and disadvantages of the applications chosen and their implementations to the respective platform.Μεταπτυχιακή Εργασίαhttp://creativecommons.org/licenses/by/4.0/Πολυτεχνείο Κρήτης::Σχολή Ηλεκτρονικών Μηχανικών και Μηχανικών ΥπολογιστώνCharitopoulos_Georgios_MSc_2015.pdfChania [Greece]Library of TUC2015-10-27image/jpg3.6 MBfree Charitopoulos Georgios Χαριτοπουλος Γεωργιος Pnevmatikatos Dionysios Πνευματικατος Διονυσιος Dollas Apostolos Δολλας Αποστολος Papaefstathiou Ioannis Παπαευσταθιου Ιωαννης Πολυτεχνείο Κρήτης Technical University of Crete Schedulers ST Microelectronics Field programmable logic arrays FPGAs field programmable gate arrays field programmable logic arrays fpgas Partial reconfiguration Run-Time System Manager