<efrbr:recordSet xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:efrbr="http://vfrbr.info/efrbr/1.1" xmlns:efrbr-work="http://vfrbr.info/efrbr/1.1/work" xmlns:efrbr-expression="http://vfrbr.info/efrbr/1.1/expression" xmlns:efrbr-manifestation="http://vfrbr.info/efrbr/1.1/manifestation" xmlns:efrbr-person="http://vfrbr.info/efrbr/1.1/person" xmlns:efrbr-corporateBody="http://vfrbr.info/efrbr/1.1/corporateBody" xmlns:efrbr-concept="http://vfrbr.info/efrbr/1.1/concept" xmlns:efrbr-structure="http://vfrbr.info/efrbr/1.1/structure" xmlns:efrbr-responsible="http://vfrbr.info/efrbr/1.1/responsible" xmlns:efrbr-subject="http://vfrbr.info/efrbr/1.1/subject" xmlns:efrbr-other="http://vfrbr.info/efrbr/1.1/other" xsi:schemaLocation="http://vfrbr.info/efrbr/1.1 http://vfrbr.info/schemas/1.1/efrbr.xsd"><efrbr:entities><efrbr-work:work identifier="http://purl.tuc.gr/dl/dias/D52EC270-93B3-43FB-A7E5-4483C01882D6"><efrbr-work:titleOfTheWork>Orderings and partitions of PDE copmutations for a fixed size VLSI architecture</efrbr-work:titleOfTheWork></efrbr-work:work><efrbr-expression:expression identifier="http://purl.tuc.gr/dl/dias/D52EC270-93B3-43FB-A7E5-4483C01882D6"><efrbr-expression:titleOfTheExpression>Orderings and partitions of PDE copmutations for a fixed size VLSI architecture</efrbr-expression:titleOfTheExpression><efrbr-expression:formOfExpression vocabulary="DIAS:TYPES">
            Πλήρης Δημοσίευση σε Συνέδριο
            Conference Full Paper
         </efrbr-expression:formOfExpression><efrbr-expression:dateOfExpression type="issued">2015-10-16</efrbr-expression:dateOfExpression><efrbr-expression:dateOfExpression type="published">1987</efrbr-expression:dateOfExpression><efrbr-expression:languageOfExpression vocabulary="iso639-1">en</efrbr-expression:languageOfExpression><efrbr-expression:summarizationOfContent>The parallel iterative solution of systems arising from the finite element discretization of elliptic PDEs, is the problem considered here. A red-black ordering is introduced to increase the degree of parallelism of the computation. Space-time domain expansion techniques are used to partition the computation for a proposed fixed-size VLSI architecture.</efrbr-expression:summarizationOfContent><efrbr-expression:useRestrictionsOnTheExpression type="creative-commons">http://creativecommons.org/licenses/by/4.0/</efrbr-expression:useRestrictionsOnTheExpression><efrbr-expression:note type="page range">366-375 </efrbr-expression:note><efrbr-expression:note type="conference name">Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow</efrbr-expression:note></efrbr-expression:expression><efrbr-person:person identifier="http://users.isc.tuc.gr/~gsaridakis"><efrbr-person:nameOfPerson vocabulary="TUC:LDAP">
            Saridakis Ioannis
            Σαριδακης Ιωαννης
         </efrbr-person:nameOfPerson></efrbr-person:person><efrbr-person:person identifier="http://users.isc.tuc.gr/~epapadopoulos1"><efrbr-person:nameOfPerson vocabulary="TUC:LDAP">
            Papadopoulos Emmanouil
            Παπαδοπουλος Εμμανουηλ
         </efrbr-person:nameOfPerson></efrbr-person:person><efrbr-person:person identifier="http://viaf.org/viaf/224322277"><efrbr-person:nameOfPerson vocabulary="VIAF">
            Papatheodorou, Théodore
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