<efrbr:recordSet xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xmlns:efrbr="http://vfrbr.info/efrbr/1.1" xmlns:efrbr-work="http://vfrbr.info/efrbr/1.1/work" xmlns:efrbr-expression="http://vfrbr.info/efrbr/1.1/expression" xmlns:efrbr-manifestation="http://vfrbr.info/efrbr/1.1/manifestation" xmlns:efrbr-person="http://vfrbr.info/efrbr/1.1/person" xmlns:efrbr-corporateBody="http://vfrbr.info/efrbr/1.1/corporateBody" xmlns:efrbr-concept="http://vfrbr.info/efrbr/1.1/concept" xmlns:efrbr-structure="http://vfrbr.info/efrbr/1.1/structure" xmlns:efrbr-responsible="http://vfrbr.info/efrbr/1.1/responsible" xmlns:efrbr-subject="http://vfrbr.info/efrbr/1.1/subject" xmlns:efrbr-other="http://vfrbr.info/efrbr/1.1/other" xsi:schemaLocation="http://vfrbr.info/efrbr/1.1 http://vfrbr.info/schemas/1.1/efrbr.xsd"><efrbr:entities><efrbr-work:work identifier="http://purl.tuc.gr/dl/dias/E0F555C4-D220-40B9-81F3-A8E010B6AE56"><efrbr-work:titleOfTheWork>Verilog-A Based Implementation of a MOSFET Model for Analog Integrated Circuit</efrbr-work:titleOfTheWork></efrbr-work:work><efrbr-expression:expression identifier="http://purl.tuc.gr/dl/dias/E0F555C4-D220-40B9-81F3-A8E010B6AE56"><efrbr-expression:titleOfTheExpression>Verilog-A Based Implementation of a MOSFET Model for Analog Integrated Circuit</efrbr-expression:titleOfTheExpression><efrbr-expression:formOfExpression vocabulary="DIAS:TYPES">
            Διπλωματική Εργασία
            Diploma Work
         </efrbr-expression:formOfExpression><efrbr-expression:dateOfExpression type="issued">2025-07-10</efrbr-expression:dateOfExpression><efrbr-expression:dateOfExpression type="published">2025</efrbr-expression:dateOfExpression><efrbr-expression:languageOfExpression vocabulary="iso639-1">en</efrbr-expression:languageOfExpression><efrbr-expression:summarizationOfContent>Recent advances in the field of analogue electronics have led to an increased demand for the creation of programmable models of analogue circuits. The present thesis sets out the development and implementation of a compact model of a MOSFET, based on the theoretical EKV model, and implemented using the Verilog-A language. The utilization of simulation and compilation environments, such as the open server OpenVAF and Ngspice, is instrumental in facilitating the effective execution of the work. The construction of a model that can perform the function of an nMOS or a pMOS nanometric operating in a saturated state is facilitated by these. In this model, physical dependencies such as temperature, channel length, and second-order effects are incorporated, ensuring the attainment of continuous expressions for all inversion regions. The model's behaviour is validated against experimental data by means of simulation, thus enabling the evaluation of parameters such as drain current, inversion coefficient, capacitances, transconductances, and response to thermal and flicker noise. This results in an accurate, compact and versatile model, which is suitable for supporting integrated analog circuits designs with a wide range of values for the inversion coefficient.</efrbr-expression:summarizationOfContent><efrbr-expression:contextForTheExpression>A technical report of the procedure to build a MOSFET model</efrbr-expression:contextForTheExpression><efrbr-expression:useRestrictionsOnTheExpression type="creative-commons">http://creativecommons.org/licenses/by/4.0/</efrbr-expression:useRestrictionsOnTheExpression><efrbr-expression:note type="academic unit">Technical University of Crete::School of Electrical and Computer Engineering</efrbr-expression:note></efrbr-expression:expression><efrbr-manifestation:manifestation identifier="https://dias.library.tuc.gr/view/103807"><efrbr-manifestation:titleOfTheManifestation>Gallego_Velazquez-Alba_Dip_2025.pdf</efrbr-manifestation:titleOfTheManifestation><efrbr-manifestation:publicationDistribution><efrbr-manifestation:placeOfPublicationDistribution type="distribution">Chania [Greece]</efrbr-manifestation:placeOfPublicationDistribution><efrbr-manifestation:publisherDistributor type="distributor">Library of TUC</efrbr-manifestation:publisherDistributor><efrbr-manifestation:dateOfPublicationDistribution>2025-07-10</efrbr-manifestation:dateOfPublicationDistribution></efrbr-manifestation:publicationDistribution><efrbr-manifestation:formOfCarrier>application/pdf</efrbr-manifestation:formOfCarrier><efrbr-manifestation:extentOfTheCarrier>5.6 MB</efrbr-manifestation:extentOfTheCarrier><efrbr-manifestation:accessRestrictionsOnTheManifestation>free</efrbr-manifestation:accessRestrictionsOnTheManifestation></efrbr-manifestation:manifestation><efrbr-person:person identifier="http://users.isc.tuc.gr/~agallego"><efrbr-person:nameOfPerson vocabulary="TUC:LDAP">
            Gallego Velazquez Alba
            Gallego Velazquez Alba
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            Bucher Matthias
            Bucher Matthias
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            Gyftakis Konstantinos
            Γυφτακης Κωνσταντινος
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            Morinigo-Sotelo Daniel 
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            Πολυτεχνείο Κρήτης
            Technical University of Crete
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            Analogue electronics and microelectronics 
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