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Forward-Edge control-Flow integrity ISA extensions for RISC-V architecture

Palli Argyro

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URI: http://purl.tuc.gr/dl/dias/B9924534-0B9C-4610-856E-D8B053DC6C51
Year 2023
Type of Item Diploma Work
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Bibliographic Citation Argyro Palli, "Forward-Edge control-Flow integrity ISA extensions for RISC-V architecture", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 2023 https://doi.org/10.26233/heallink.tuc.97773
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Summary

Jump Oriented Programming attacks pose a security threat against modern processors. In order to enhance the security of designs based on the RISC-V architecture, a set of ISA extensions, namely the Forward-Edge Control Flow Integrity (CFI) ISA extension, have been proposed and are currently under evaluation by the relevant RISC-V committees. This thesis presents the implementation and evaluation of the CFI ISA extension on the CVA6 soft processor core. The study leveraged the Genesys2 board as the hardware platform and the Verilator simulator for experimentation. The CFI extension was integrated into the CVA6 core, ensuring robust protection against potential security vulnerabilities stemming from JOP attacks. Notably, the performance overhead incurred by this security enhancement was limited to a mere 2%, demonstrating its minimal impact on system efficiency. Furthermore, the area utilization overhead on the Genesys2 board was effectively managed, with an minimal impact compared to the original design. This research underscores the feasibility of bolstering system security through ISA extensions, while preserving system performance and resource utilization at highly acceptable levels.

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