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Technical University of Crete
Technical University of Crete
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| URI | http://purl.tuc.gr/dl/dias/0FD55AC1-C9E0-4548-AC2A-7DBE50C763CC | - |
| Identifier | https://doi.org/10.1109/BIBE50027.2020.00024 | - |
| Identifier | https://ieeexplore.ieee.org/document/9288011 | - |
| Language | en | - |
| Extent | 8 pages | en |
| Title | Exploring modern FPGA platforms for faster phylogeny reconstruction with RAxML | en |
| Creator | Malakonakis Pavlos | en |
| Creator | Μαλακωνακης Παυλος | el |
| Creator | Brokalakis Andreas | en |
| Creator | Μπροκαλακης Ανδρεας | el |
| Creator | Alachiotis Nikolaos | en |
| Creator | Αλαχιωτης Νικολαος | el |
| Creator | Sotiriadis Evripidis | en |
| Creator | Σωτηριαδης Ευριπιδης | el |
| Creator | Dollas Apostolos | en |
| Creator | Δολλας Αποστολος | el |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | The Phylogenetic Likelihood Function (PLF) is one of the cornerstone functions in most phylogenetic inference tools; its execution represents the majority of time required to complete an analysis. This work proposes the acceleration of this function using reconfigurable hardware accelerators, focusing on system-on-chips that integrate Field Programmable Gate Array (FPGA) resources as well as traditional High Performance Computing (HPC) systems that use FPGA-based accelerator cards. Taking into account the specific properties of each platform in order to exploit their processing capabilities, the proposed solutions provide significant performance gains. The measured acceleration of PLF function is up to 8x while the overall time to complete a phylogenetic analysis using the popular RAxML software can be reduced up to 3.2 times (with respect to a pure software implementation on a high-end server processor). Compared to other similar solutions proposed in literature, our systems perform up to 65% faster. | en |
| Type of Item | Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Publication | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2022-01-07 | - |
| Date of Publication | 2020 | - |
| Subject | Phylogenetic inference | en |
| Subject | Phylogenetic tree | en |
| Subject | RAxML (Randomized Axelerated Maximum Likelihood) | en |
| Subject | PLF (Phylogenetic Likelihood Function) | en |
| Subject | Phylogenetic likelihood | en |
| Subject | FPGA (Field Programmable Gate Array) | en |
| Subject | Reconfigurable hardware | en |
| Subject | Amazon AWS F1 | en |
| Bibliographic Citation | P. Malakonakis, A. Brokalakis, N. Alachiotis, E. Sotiriades and A. Dollas, "Exploring modern FPGA platforms for faster phylogeny reconstruction with RAxML," in BIBE 2020, pp. 97-104, doi: 10.1109/BIBE50027.2020.00024 | en |
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