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Design of micropower operational transconductance amplifiers for high Total Ionizing Dose (TID) effects and aspects of implementation of a dedicated 65 nm CMOS TID-Process Design Kit

Papadopoulou Alexia

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Summary

Microelectronic system components intended for space, aeronautic, military, nuclear physics and biomedical applications should exhibit radiation hardness, the ability to withstand damages caused by high levels of ionizing radiation. The increasing demand for higher system performance and the availability of advanced CMOS technologies are responsible for the shift towards the use of commercial foundry CMOS processes for such applications. In high energy physics (HEP) experiments, such as the High-Luminosity Large Hadron Collider (HL-LHC) at CERN, ultra high Total Ionizing Dose (TID) levels up to 1 Grad(SiO2) are expected, where many components such as particle detectors are designed in bulk silicon CMOS. However, a key concern is the impact of TID on CMOS device performance. In this work, the system integration of a dedicated 65 nm CMOS TID-Process Design Kit developed for CERN is presented, accounting for effects of 100, 200 and 500 Mrad(SiO2), established for TID experiments carried out at three temperatures (-30°C, 0°C and 25°C) for standard-layout MOSTs and Enclosed-Gate MOSTs. The scope of this work is to provide insight in the way high TID phenomena affect low power analog CMOS design, as well as to show the effectiveness of inversion-level based techniques for radiation hardened design. In that direction, two operational transconductance amplifiers (OTAs) are designed and selected criteria are used for bench-marking their performance, such as gain bandwidth (GBW), phase margin (PM), slew rate (SR) and power dissipation (PD).

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