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Reconfigurable logic based second generation digital sound processing and enhancement system

Kokkinis Iraklis-Taxiarchis

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URI: http://purl.tuc.gr/dl/dias/EC8DBE9D-7AA7-4C71-A426-AEAC50AC16BD
Year 2021
Type of Item Diploma Work
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Bibliographic Citation Iraklis-Taxiarchis Kokkinis, "Reconfigurable logic based second generation digital sound processing and enhancement system", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 2021 https://doi.org/10.26233/heallink.tuc.88931
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Summary

When it comes to digital audio, for a long time the most common format to store and distribute music was the CD quality of 44.1 kHz sampling rate and 16 bit depth. For many music enthusiasts, the CD quality is unable offer the best possible listening experience possible, supporting the superiority of high-resolution audio formats. The jury is still out, on the qualities and advantages of high resolution audio formats. This thesis diploma aims to improve standard CD quality files with the application of the cubic spline interpolation mathematical method on uncompressed .wav file, based on previous work done by Triantafillos Mourtzanos.Having studied the capabilities of the human ear and the role played by psychoacoustics on the auditory experience and the mathematics behind audio engineering as well as interpolation, the mathematical models of linear and cubic spline interpolation were recreated, using Matlab, as presented by Triantafillos Mourtzanos, which utilized floating point arithmetic. These models were then converted to a more hardware efficient approach, using a four data point window of inputs and fixed-point arithmetic. The new models were then compared, with a variety of audio files as inputs, judging the results by their spectrograms, waveforms and the audibility of the resulting WAVE files, confirming the viability of fixed point arithmetic for the models.As a follow-up a hardware implementation was was designed targeting a Zedboard FPGA, using Vivado HLS, Vivado and Vitis, developed by Xilinx. The resulting implementation was compared to a software adaptation and its results were compared to the fixed point model developed in Matlab.

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