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FOSS EKV2.6 Verilog-A compact MOSFET model

Grabiński, Władysław, Pavanello Marcelo Antonio, de Souza Michelly A.S., Tomaszewski Daniel, Malesinska Jola, Guszko Grzegorz, Bucher Matthias, Makris Nikolaos, Nikolaou Aristeidis, Abo-Elhadid Ahmed, Mierzwinski Marek, Lemaitre Laurent, Brinson Mike E., Lallement Christophe, Sallese, Jean-Michel 1964-, Yoshitomi Sadayuki, Malisse Paul, Oguey Henri J., Cserveny Stefan, Enz Christian C., Krummenacher François

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URIhttp://purl.tuc.gr/dl/dias/88F6A8F0-4CA8-4C89-A318-C13FCACA8B50-
Identifierhttps://doi.org/10.1109/ESSDERC.2019.8901822-
Identifierhttps://ieeexplore.ieee.org/document/8901822-
Languageen-
Extent4 pagesen
TitleFOSS EKV2.6 Verilog-A compact MOSFET modelen
CreatorGrabiński, Władysławen
CreatorPavanello Marcelo Antonioen
Creatorde Souza Michelly A.S.en
CreatorTomaszewski Danielen
CreatorMalesinska Jolaen
CreatorGuszko Grzegorzen
CreatorBucher Matthiasen
CreatorBucher Matthiasel
CreatorMakris Nikolaosen
CreatorΜακρης Νικολαοςel
CreatorNikolaou Aristeidisen
CreatorΝικολαου Αριστειδηςel
CreatorAbo-Elhadid Ahmeden
CreatorMierzwinski Mareken
CreatorLemaitre Laurenten
CreatorBrinson Mike E.en
CreatorLallement Christopheen
CreatorSallese, Jean-Michel 1964-en
CreatorYoshitomi Sadayukien
CreatorMalisse Paulen
CreatorOguey Henri J.en
CreatorCserveny Stefanen
CreatorEnz Christian C.en
CreatorKrummenacher Françoisen
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryThe EKV2.6 MOSFET compact model has had a considerable impact on the academic and industrial community of analog integrated circuit design, since its inception in 1996. The model is available as a free open-source software (FOSS) tool coded in Verilog-A. The present paper provides a short review of foundations of the model and shows its capabilities via characterization and modeling based on a test chip in 180 nm CMOS fabricated via Europractice.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2020-04-30-
Date of Publication2019-
SubjectCompact/SPICE modelen
SubjectEKV2.6 modelen
SubjectVerilog-Aen
Bibliographic CitationW. Grabinski, M. Pavanello, M. De Souza, D. Tomaszewski, J. Malesinska, G. Guszko, M. Bucher, N. Makris, A. Nikolaou, A. Abo-Elhadid, M. Mierzwinski, L. Lemaitre, M. Brinson, C. Lallement, J.-M. Sallese, S. Yoshitomi, P. Malisse, H. Oguey, S. Cserveny, C. Enz and F. Krummenacher, "FOSS EKV2.6 Verilog-A compact MOSFET model," in 49th European Solid-State Device Research Conference, 2019, pp. 190-193. doi: 10.1109/ESSDERC.2019.8901822en

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