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HLS algorithmic explorations for HPC execution on reconfigurable hardware - ECOSCALE

Malakonakis Pavlos, Georgopoulos Konstantinos, Ioannou Angelos, Lavagno, Luciano, 1959-, Papaefstathiou Ioannis, Mavroidis Iakovos

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URIhttp://purl.tuc.gr/dl/dias/BC08B6A9-BA7E-4140-B23E-9331E32FC70D-
Identifierhttps://doi.org/10.1007/978-3-319-78890-6_58-
Identifierhttps://link.springer.com/chapter/10.1007/978-3-319-78890-6_58-
Languageen-
Extent13 pagesen
TitleHLS algorithmic explorations for HPC execution on reconfigurable hardware - ECOSCALEen
CreatorMalakonakis Pavlosen
CreatorΜαλακωνακης Παυλοςel
CreatorGeorgopoulos Konstantinosen
CreatorΓεωργοπουλος Κωνσταντινοςel
CreatorIoannou Angelosen
CreatorΙωαννου Αγγελοςel
CreatorLavagno, Luciano, 1959-en
CreatorPapaefstathiou Ioannisen
CreatorΠαπαευσταθιου Ιωαννηςel
CreatorMavroidis Iakovosen
PublisherSpringer Verlagen
Content SummaryModern-day High Performance Computing (HPC) trends are shifting towards exascale performance figures in order to satisfy the contemporary needs of many compute-intensive and power-hungry applications. It is in this context that the EU-funded ECOSCALE project came about. It introduces a highly innovative architecture that offers spreading the workload among a number of independent concurrently operating standard and reconfigurable processing elements that execute OpenCL cores as well as minimising the need for data transfers. The particular cores implemented on the ECOSCALE prototype correspond to the project use cases and have been the source of a meticulous exploration process for optimal performance results such as execution time. This paper documents the synthesis process for two ECOSCALE algorithms, i.e. Hyperbolic and Michelsen. They are both seminal in the calculation of the Rachford-Rice equation used extensively in the field of oil Reservoir Simulation (RS). The two algorithms are first optimised manually by proficient designers in the field using Vivado HLS. Subsequently, additional processing is performed based on a specialised Design Space Exploration (DSE) tool that delivers synthesisable code for reconfigurable logic implementation. Finally, the resulting reconfigurable cores are executed on the ECOSCALE system in order to perform measurements on real data. The evaluation results reveal significant benefits in calculation times over conventional CPU platforms which merits even better considering that they come at a significantly reduced power consumption cost.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2019-10-09-
Date of Publication2018-
SubjectExascaleen
SubjectHigh-level synthesisen
SubjectOpenCLen
SubjectReconfigurable hardwareen
Bibliographic CitationP. Malakonakis, K. Georgopoulos, A. Ioannou, L. Lavagno, I. Papaefstathiou and I. Mavroidis, "HLS algorithmic explorations for HPC execution on reconfigurable hardware - ECOSCALE," in 14th International Symposium on Applied Reconfigurable Computing, 2018, pp. 724-736. doi: 10.1007/978-3-319-78890-6_58en

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