Institutional Repository [SANDBOX]
Technical University of Crete
EN  |  EL

Search

Browse

My Space

Total ionizing dose effects on analog performance of 65 nm bulk CMOS with enclosed-gate and standard layout

Bucher Matthias, Nikolaou Aristeidis, Papadopoulou Alexia, Makris Nikolaos, Chevas Loukas, Borghello Giulio, Koch Henri D., Faccio Federico

Simple record

URIhttp://purl.tuc.gr/dl/dias/8841AE2A-55D0-4528-BA95-4D4F867B038C-
Identifierhttps://doi.org/10.1109/ICMTS.2018.8383790-
Identifierhttps://ieeexplore.ieee.org/document/8383790-
Languageen-
Extent5 pagesen
TitleTotal ionizing dose effects on analog performance of 65 nm bulk CMOS with enclosed-gate and standard layouten
CreatorBucher Matthiasen
CreatorBucher Matthiasel
CreatorNikolaou Aristeidisen
CreatorΝικολαου Αριστειδηςel
CreatorPapadopoulou Alexiaen
CreatorΠαπαδοπουλου Αλεξιαel
CreatorMakris Nikolaosen
CreatorΜακρης Νικολαοςel
CreatorChevas Loukasen
CreatorΧεβας Λουκαςel
CreatorBorghello Giulioen
CreatorKoch Henri D.en
CreatorFaccio Federico en
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryHigh doses of ionizing irradiation cause significant shifts in design parameters of standard bulk silicon CMOS. Analog performance of a commercial 65 nm CMOS technology is examined for standard and enclosed gate layouts, with Total Ionizing Dose (TID) up to 500 Mrad(SiO2). The paper provides insight into geometrical and bias dependence of key design parameters such as threshold voltage, DIBL, transconductance efficiency, slope factor, and intrinsic gain. A modeling approach for an efficient representation of saturation transfer characteristics under TID from weak through moderate and strong inversion and over channel length is discussed.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2019-09-06-
Date of Publication2018-
SubjectAnalog parametersen
SubjectEnclosed layouten
SubjectModelingen
SubjectMOSFETen
SubjectParameter extractionen
SubjectRadiation hardnessen
SubjectTotal ionizing doseen
Bibliographic CitationM. Bucher, A. Nikolaou, A. Papadopoulou, N. Makris, L. Chevas, G. Borghello, H.D. Koch and F. Faccio, "Total ionizing dose effects on analog performance of 65 nm bulk CMOS with enclosed-gate and standard layout," in IEEE International Conference on Microelectronic Test Structures, 2018, pp. 166-170. doi: 10.1109/ICMTS.2018.8383790en

Services

Statistics

 

Copyright © DIAS 2013