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Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances

Makris Nikolaos, Jazaeri, Farzan 1984-, Sallese, Jean-Michel 1964-, Sharma Rupendra Kumar, Bucher Matthias

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URIhttp://purl.tuc.gr/dl/dias/3E0F8C3A-1AEC-4744-BFC1-51E75746F36E-
Identifierhttps://doi.org/10.1109/TED.2018.2838101-
Identifierhttps://ieeexplore.ieee.org/document/8371530-
Languageen-
Extent7 pagesen
TitleCharge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductancesen
CreatorMakris Nikolaosen
CreatorΜακρης Νικολαοςel
CreatorJazaeri, Farzan 1984-en
CreatorSallese, Jean-Michel 1964-en
CreatorSharma Rupendra Kumaren
CreatorBucher Matthiasen
CreatorBucher Matthiasel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryThe double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of not only device fabrication but also its operation. The device has been largely used in low-noise applications, but also more recently, in power electronics. Physics-based compact models for JFETs, contrary to MOSFETs, are, however, scarce. In this paper, an analytical, charge-based model is established for the mobile charges, drain current, and transconductances of symmetric DG JFETs, covering all regions of device operation. The model is unified and continuous from subthreshold to linear and saturation operation and is valid over a large temperature range. This charge-based model constitutes the basis of a full compact model of the DG JFET.en
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2019-09-03-
Date of Publication2018-
SubjectAnalytical modelen
SubjectCircuit simulationen
SubjectCompact modelen
SubjectJFETen
SubjectJunction field-effect transistoren
SubjectTemperature effecten
Bibliographic CitationN. Makris, F. Jazaeri, J.-M. Sallese, R.K. Sharma and M. Bucher, "Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2744-2750, Jul. 2018. doi: 10.1109/TED.2018.2838101en

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