![Ιδρυματικό Αποθετήριο [SANDBOX]](images/dias.logo.png "Ιδρυματικό Αποθετήριο [SANDBOX]"){kind=logo}
Ιδρυματικό Αποθετήριο [SANDBOX]
Πολυτεχνείο Κρήτης
Πολυτεχνείο Κρήτης
EN
|
EL
| URI: | http://purl.tuc.gr/dl/dias/3E0F8C3A-1AEC-4744-BFC1-51E75746F36E | ||
| Έτος | 2018 | ||
| Τύπος | Δημοσίευση σε Περιοδικό με Κριτές | ||
| Άδεια Χρήσης |
|
||
| Βιβλιογραφική Αναφορά | N. Makris, F. Jazaeri, J.-M. Sallese, R.K. Sharma and M. Bucher, "Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2744-2750, Jul. 2018. doi: 10.1109/TED.2018.2838101 https://doi.org/10.1109/TED.2018.2838101 | ||
| Εμφανίζεται στις Συλλογές |
The double-gate (DG) junction field-effect transistor (JFET) is a classical electron device, with a simple structure that presents many advantages in terms of not only device fabrication but also its operation. The device has been largely used in low-noise applications, but also more recently, in power electronics. Physics-based compact models for JFETs, contrary to MOSFETs, are, however, scarce. In this paper, an analytical, charge-based model is established for the mobile charges, drain current, and transconductances of symmetric DG JFETs, covering all regions of device operation. The model is unified and continuous from subthreshold to linear and saturation operation and is valid over a large temperature range. This charge-based model constitutes the basis of a full compact model of the DG JFET.
Copyright © DIAS 2013
