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Institutional Repository [SANDBOX]
Technical University of Crete
Technical University of Crete
EN
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| URI | http://purl.tuc.gr/dl/dias/549A3EB1-38F3-45F2-8009-65ADC308F4B3 | - |
| Identifier | https://doi.org/10.1109/ESSDERC.2018.8486848 | - |
| Identifier | https://ieeexplore.ieee.org/document/8486848 | - |
| Language | en | - |
| Extent | 4 pages | en |
| Title | A compact model for static and dynamic operation of symmetric double-gate junction FETs | en |
| Creator | Makris Nikolaos | en |
| Creator | Μακρης Νικολαος | el |
| Creator | Bucher Matthias | en |
| Creator | Bucher Matthias | el |
| Creator | Jazaeri, Farzan 1984- | en |
| Creator | Sallese, Jean-Michel 1964- | en |
| Publisher | Institute of Electrical and Electronics Engineers | en |
| Content Summary | The present work describes a novel charge-based compact model of the symmetric double-gate junction field effect transistor (DG JFET) for circuit simulation. The model is physics-based and addresses static and capacitive behavior of the JFET. The model covers all regions of device operation of the depletion mode JFET, relies only on physical and electrical parameters of the device, and includes short-channel effects. The model is validated with respect to TCAD simulation as well as with respect to measurements from JFETs. The model is implemented in SPICE circuit simulators using Verilog-A based code. | en |
| Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
| Type of Item | Conference Full Paper | en |
| License | http://creativecommons.org/licenses/by/4.0/ | en |
| Date of Item | 2019-05-31 | - |
| Date of Publication | 2018 | - |
| Subject | Compact model | en |
| Subject | Dynamic model | en |
| Subject | High frequency | en |
| Subject | JFET | en |
| Subject | Junction field effect transistor | en |
| Subject | SPICE | en |
| Subject | Verilog-A | en |
| Bibliographic Citation | N. Makris, M. Bucher, F. Jazaeri and J. M. Sallese "A compact model for static and dynamic operation of symmetric double-gate junction FETs," in 48th European Solid-State Device Research Conference, pp. 238-241, 2018. doi: 10.1109/ESSDERC.2018.8486848 | en |
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