Το έργο με τίτλο An FPGA-based high-throughput stream join architecture από τον/τους δημιουργό/ούς Kritikakis Charalabos, Chrysos Grigorios, Dollas Apostolos, Pnevmatikatos Dionysios διατίθεται με την άδεια Creative Commons Αναφορά Δημιουργού 4.0 Διεθνές
Βιβλιογραφική Αναφορά
C. Kritikakis, G. Chrysos, A. Dollas and D. N. Pnevmatikatos, "An FPGA-based high-throughput stream join architecture," in 26th International Conference on Field-Programmable Logic and Applications, 2016. doi: 10.1109/FPL.2016.7577354
https://doi.org/10.1109/FPL.2016.7577354
Stream join is a fundamental operation that combines information from different high-speed and high-volume data streams. This paper presents an FPGA-based architecture that maps the most performance-efficient stream join algorithm, i.e. ScaleJoin, to reconfigurable logic. The system was fully implemented on a Convey HC-2ex hybrid computer and the experimental performance evaluation shows that the proposed system outperforms by up to one order of magnitude the corresponding fully optimized parallel software-based solution running on a high-end 48-core multiprocessor platform. The proposed architecture can be used as a generic template for mapping stream processing algorithms to reconfigurable logic, taking into consideration real-world challenges.