URI | http://purl.tuc.gr/dl/dias/B47663B8-7DCC-4DDD-9680-2973E8D9E282 | - |
Αναγνωριστικό | https://ieeexplore.ieee.org/document/7731785/ | - |
Αναγνωριστικό | https://doi.org/10.1109/ELMAR.2016.7731785 | - |
Γλώσσα | en | - |
Μέγεθος | 5 pages | en |
Τίτλος | An evaluation of vivado HLS for efficient system design | en |
Δημιουργός | Georgopoulos Konstantinos | en |
Δημιουργός | Γεωργοπουλος Κωνσταντινος | el |
Δημιουργός | Chrysos Grigorios | en |
Δημιουργός | Χρυσος Γρηγοριος | el |
Δημιουργός | Malakonakis Pavlos | en |
Δημιουργός | Μαλακωνακης Παυλος | el |
Δημιουργός | Tampouratzis Nikolaos | en |
Δημιουργός | Ταμπουρατζης Νικολαος | el |
Δημιουργός | Dollas Apostolos | en |
Δημιουργός | Δολλας Αποστολος | el |
Δημιουργός | Pnevmatikatos Dionysios | en |
Δημιουργός | Πνευματικατος Διονυσιος | el |
Δημιουργός | Papaefstathiou Ioannis | en |
Δημιουργός | Παπαευσταθιου Ιωαννης | el |
Εκδότης | Institute of Electrical and Electronics Engineers | en |
Περίληψη | High-Level Synthesis (HLS) tools are hailed as one of the most promising ways to bridge the design productivity gap, especially for reconfigurable systems. These tools increase designer productivity at a possible performance and/or silicon cost, although the designer can play a significant role in the minimisation of both. Currently, one of the key challenges for the designer is to efficiently use the vendor-defined methodology and the design guidelines of the HLS tool. Hence, this work aims at assisting designers in taking full advantage and making optimal use of the official HLS methodology when implementing three fundamental algorithms used in a variety of video and image processing applications. One is a sorting algorithm while the other two are algorithms used in traversing tree/graph data structures. The work presented here concerns a highly popular HLS tool, namely Vivado HLS, and the experiences and analysis of the authors helps in the efficient use of the toolset, which can significantly increase design productivity when compared to the naive datasheet-based approach; the performance of all the resulting synthesisable models is also provided for completeness. | en |
Τύπος | Πλήρης Δημοσίευση σε Συνέδριο | el |
Τύπος | Conference Full Paper | en |
Άδεια Χρήσης | http://creativecommons.org/licenses/by/4.0/ | en |
Ημερομηνία | 2018-06-28 | - |
Ημερομηνία Δημοσίευσης | 2016 | - |
Θεματική Κατηγορία | Data structures | en |
Θεματική Κατηγορία | Field-programmable gate array | en |
Θεματική Κατηγορία | High-level synthesis | en |
Θεματική Κατηγορία | Reconfigurable computing | en |
Βιβλιογραφική Αναφορά | K. Georgopoulos, G. Chrysos, P. Malakonakis, A. Nikitakis, N. Tampouratzis, A. Dollas, D. Pnevmatikatos and Y. Papaefstathiou, "An evaluation of vivado HLS for efficient system design" in 58th International Symposium ELMAR, 2016, pp. 195-199. doi: 10.1109/ELMAR.2016.7731785 | en |