URI | http://purl.tuc.gr/dl/dias/CB1579C1-ADC3-483D-85A1-52010D9CE731 | - |
Identifier | http://ieeexplore.ieee.org/document/8056796/ | - |
Identifier | https://doi.org/10.23919/FPL.2017.8056796 | - |
Language | en | - |
Title | A generic high throughput architecture for stream processing | en |
Creator | Rousopoulos Christos | en |
Creator | Ρουσοπουλος Χρηστος | el |
Creator | Karandeinos Ektor | en |
Creator | Καρανδεινος Εκτωρ | el |
Creator | Chrysos Grigorios | en |
Creator | Χρυσος Γρηγοριος | el |
Creator | Dollas Apostolos | en |
Creator | Δολλας Αποστολος | el |
Creator | Pnevmatikatos Dionysios | en |
Creator | Πνευματικατος Διονυσιος | el |
Publisher | Institute of Electrical and Electronics Engineers | en |
Content Summary | Stream join is a fundamental and computationally expensive data mining operation for relating information from different data streams. This paper presents two FPGA-based architectures that accelerate stream join processing. The proposed hardware-based systems were implemented on a multi-FPGA hybrid system with high memory bandwidth. The experimental evaluation shows that our proposed systems can outperform a software-based solution that runs on a high-end, 48-core multiprocessor platform by at least one order of magnitude. In addition, the proposed solutions outperform any other previously proposed hardware-based or software-based solutions for stream join processing. Finally, our proposed hardware-based architectures can be used as generic templates to map stream processing algorithms on reconfigurable logic, taking into consideration real-world challenges and restrictions. | en |
Type of Item | Πλήρης Δημοσίευση σε Συνέδριο | el |
Type of Item | Conference Full Paper | en |
License | http://creativecommons.org/licenses/by/4.0/ | en |
Date of Item | 2018-03-22 | - |
Date of Publication | 2017 | - |
Subject | Stream processing | en |
Bibliographic Citation | C. Rousopoulos, E. Karandeinos, G. Chrysos, A. Dollas and D.N. Pnevmatikatos, "A generic high throughput architecture for stream processing," in 27th International Conference on Field Programmable Logic and Applications, 2017. doi:10.23919/FPL.2017.8056796 | el |