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	961-975 από 3123 αποτελέσματα
961	M. Katevenis, G. Passas, D. Simos, I. Papaefstathiou and N. Chrysos, "Variable packet size buffered crossbar (CICQ) switches," presented at IEEE International Conference on Communications, Paris, France, 2004.	2015-11-16
962	I. Papaefstathiou, D. Pnevmatikatos, V. Dimopoulos, "A Memory-Efficient Reconfigurable Aho-Corasick FSM Implementation for Intrusion Detection Systems," in International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation, 2007, pp. 186 - 193. doi: 10.1109/ICSAMOS.2007.4285750	2015-11-16
963	I. Papaefstathiou, V. Papaefstathiou, "Memory-Efficient 5D Packet Classification At 40 Gbps," in 26th IEEE International Conference on Computer Communications2007, pp. 1370 - 1378. doi: 10.1109/INFCOM.2007.162	2015-11-16
964	G. Kornaros I. Papaefstathiou D. Pnevmatikatos, "Dynamic Software-Assisted Monitoring of On-Chip Interconnects," presented at Workshop on Diagnostic Services in Network-on-Chips, IEEEDesign Automation and Test in Europe, Nice, France, 2007.	2015-11-16
965	I. Papaefstathiou, V. Papaefstathiou, "A Hardware-Engine for Layer-2 classification in low-storage, ultra high bandwidth environments," in Proceedings Design, Automation and Test in Europe, 2006, pp. 1 - 6. doi: 10.1109/DATE.2006.243813	2015-11-16
966	V. Papaefstathiou, I. Papaefstathiou, "An innovative low-cost Classification Scheme for combined multi-Gigabit IP and Ethernet Networks," in IEEE International Conference on Communications, 2006, pp. 211 - 216. doi: 10.1109/ICC.2006.254729	2015-11-16
967	V. Papaefstathiou, I. Papaefstathiou. (2005,November). A Memory Efficient, 100 Gb/sec MAC Classification Engine . Presented at 30th Annual IEEE Conference on Local Computer Networks (LCN). [Online]. Available: http://lens.csie.ncku.edu.tw/Library/Paper/IEEE%20LCN%202005/lcn057.pdf	2015-11-16
968	T. Otphanoudakis, G. Kornaros, C. Kachris, I. Mavroidis, A. Nikologiannis, I. Papaefstathiou, "Queue management in network processors," in Proceedings Design, Automation and Test in Europe, 2005, pp. 112 - 117. doi: 10.1109/DATE.2005.251	2015-11-16
969	J.D. Garside, I. Papaefstathiou, A. Efthymiou, "A low-power processor architecture optimized for wireless devices," in 16th IEEE International Conference on Application-Specific Systems, Architecture Processors," 2005, pp. 185 - 190. doi: 10.1109/ASAP.2005.7	2015-11-16
970	C. Manifavas, I. Papaefstathiou, K. Theoharoulis, "HighEnd Reconfigurable Systems for Fast Windows' Password Cracking," in 17th IEEE Symposium on Field Programmable Custom Computing Machines, 2009, pp. 287 - 290. doi: 10.1109/FCCM.2009.48	2015-11-16
971	C. Galanakis, E. Sotiriades, G. Mplemenos, G. Chrysos, I. Papaefstathiou, D. Pnevmatikatos and P. Afratis, "Design and implementation of a database filter for BLAST acceleration", in Design, Automation and Test in Europe Conference and Exhibition, 2009, pp. 166 - 171. doi: 10.1109/DATE.2009.5090652	2015-11-16
972	I. Papaefstathiou, D. Meintanis, "On the Power Consumption of Security Algorithms Employed in Wireless Networks," in 6th IEEE Consumer Communications and Networking Conference, 2009, pp. 1 - 5. doi: 10.1109/CCNC.2009.4784732	2015-11-16
973	I. Papaefstathiou, I. Mavroidis, "Accelerating hardware simulation: Testbench code emulation," in International Conference on ICECE Technology, 2008, pp. 129 - 136. doi: 10.1109/FPT.2008.4762375	2015-11-16
974	I. Papaefstathiou, K. Papadopoulos, "Titan-R: A Reconfigurable Hardware Implementation of a High-Speed Compressor," in 16th International Symposium on Field-Programmable Custom Computing Machines, 2008, pp. 216 - 225. doi: 10.1109/FCCM.2008.14	2015-11-16
975	D. Meidanis, I. Papaefstathiou, "Estimation vs Measurement for Power Consumption on Xilinx VirtexII Pro FPGAs," presented at International Conference on ReConFigurable Computing and FPGAs, Mexico, 2008.	2015-11-16
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