URI | http://purl.tuc.gr/dl/dias/A6A68852-21A2-4EC8-968B-F7E027F2A84F | - |
Identifier | https://doi.org/10.1109/FPGA.2003.1227238 | - |
Identifier | http://ieeexplore.ieee.org/document/1227238/ | - |
Language | en | - |
Title | Performance analysis of fixed, reconfigurable, and custom architectures for the SCAN image and video encryption algorithm | en |
Creator | Dollas Apostolos | en |
Creator | Δολλας Αποστολος | el |
Creator | Kachrīs, Christoforos | en |
Creator | Bourbakis, Nikolaos G | en |
Publisher | Institute of Electrical and Electronics Engineers | en |
Content Summary | This paper briefly presents a block cipher encryption architecture and a reconfigurable logic based hardware design for the SCAN encryption algorithm. Detailed performance results are presented for still images as well as video, and the reconfigurable architecture is compared to software-only implementations of the same algorithm as well as a preliminary ASIC design. | en |
Type of Item | Δημοσίευση σε Συνέδριο | el |
Type of Item | Conference Publication | en |
License | http://creativecommons.org/licenses/by/4.0/ | en |
Date of Item | 2015-11-18 | - |
Date of Publication | 2003 | - |
Subject | Field programmable logic arrays | en |
Subject | FPGAs | en |
Subject | field programmable gate arrays | en |
Subject | field programmable logic arrays | en |
Subject | fpgas | en |
Bibliographic Citation | A. Dollas, C. Kachris and N. Bourbakis, "Performance analysis of fixed, reconfigurable, and custom architectures for the SCAN image and video encryption algorithm," in 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 2003. doi:10.1109/FPGA.2003.1227238 | en |