Institutional Repository [SANDBOX]
Technical University of Crete
EN  |  EL

Search

Browse

My Space

A Multi gigabit FPGA-based 5-tuple classification system

Papaefstathiou Ioannis, Nikitakis Antonios

Simple record

URIhttp://purl.tuc.gr/dl/dias/DDDD8D84-CF57-41F4-B5CA-7F2C8E762EB3-
Identifierhttps://doi.org/10.1109/ICC.2008.399-
Languageen-
TitleA Multi gigabit FPGA-based 5-tuple classification systemen
CreatorPapaefstathiou Ioannisen
CreatorΠαπαευσταθιου Ιωαννηςel
CreatorNikitakis Antoniosen
CreatorΝικητακης Αντωνιοςel
PublisherInstitute of Electrical and Electronics Engineersen
Content SummaryPacket classification is one of the most important enabling technologies for next generation network services. Even though many multi-dimensional classification algorithms have been proposed, most of them are precluded from commercial equipments due to their high memory requirements. In this paper, we present an efficient packet classification scheme, called dual stage bloom filter classification engine (2sBFCE). 2sBFC comprises of an innovative 5- field search scheme that decomposes multi-field classification rules into internal single-field rules which are combined using multi-level Bloom filters. The design of 2sBFCE is optimized for the common case based on analysis of real world classification databases. The hardware implementation of this scheme handles 4 K rules while supporting network streams at a rate of 2 Gbps even in the worst case, and more than 6 Gbps in the average case when implemented in an off-the-shelf FPGA.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-11-15-
Date of Publication2008-
Bibliographic CitationI. Papaefstathiou, A. Nikitakis, "A Multi Gigabit FPGA-Based 5-tuple Classification System," in IEEE International Conference on Communications, 2008, pp. 2081 - 2085. doi: 10.1109/ICC.2008.399en

Services

Statistics

 

Copyright © DIAS 2013