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A buffered crossbar-based chip interconnection framework supporting quality of service

Papaefstathiou Ioannis, Kornaros Georgios, Chrysos Nikolaos

Απλή Εγγραφή


URIhttp://purl.tuc.gr/dl/dias/2B05886A-D60C-4117-BAAA-37747E818594-
Αναγνωριστικόhttps://doi.org/10.1145/1228784.1228810-
Γλώσσαen-
ΤίτλοςA buffered crossbar-based chip interconnection framework supporting quality of serviceen
ΔημιουργόςPapaefstathiou Ioannisen
ΔημιουργόςΠαπαευσταθιου Ιωαννηςel
ΔημιουργόςKornaros Georgiosen
ΔημιουργόςΚορναρος Γεωργιοςel
Δημιουργός Chrysos Nikolaosen
ΕκδότηςAssociation for Computing Machineryen
ΠερίληψηAs Systems-on-a-Chip (SoCs) become larger, the problem of interconnecting the various subsystems becomes more complicated. In this framework, certain alternatives to the standard buses, based on Network Technologies, have emerged as innovative approaches for SoC's interconnect. One of the main advantages of such an alternative, is that it can offer certain Quality of Service (QoS) over the internal cross-connects while at the same time it supports higher transfer rates than the existing on-chip buses. This paper presents the first chip interconnection architecture, which is based on a buffered crossbar switch. The main advantage of the proposed system is that it efficiently supports different priority levels; it also provides several Gigabits per Second of aggregate bandwidth, while it introduces very low latency. Moreover, the hardware complexity of this highly scalable scheme is minimal. All those facts make this framework ideal for SoCs that contain IP cores with diverse speed/throughput requirements.en
ΤύποςΠλήρης Δημοσίευση σε Συνέδριοel
ΤύποςConference Full Paperen
Άδεια Χρήσηςhttp://creativecommons.org/licenses/by/4.0/en
Ημερομηνία2015-11-15-
Ημερομηνία Δημοσίευσης2007-
Βιβλιογραφική ΑναφοράI. Papaefstathiou, G. Kornaros, N. Chrysos, "A buffered crossbar-based chip interconnection framework supporting quality of service," in 17th ACM Great Lakes symposium on VLSI, 2007, pp. 90-95 . doi: 10.1145/1228784.1228810 en

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