![Institutional Repository [SANDBOX]](images/dias.logo.png "Institutional Repository [SANDBOX]"){kind=logo}
Institutional Repository [SANDBOX]
Technical University of Crete
Technical University of Crete
EN
|
EL
| URI: | http://purl.tuc.gr/dl/dias/78E3991A-C470-4A7C-8CBF-4BF9A9DF8BBE | ||
| Year | 2015 | ||
| Type of Item | Conference Full Paper | ||
| License |
|
||
| Bibliographic Citation | G. Mplemenos, I. Papaefstathiou, "Fast and power-efficient hardware implementation of a routing scheme for WSNs," IEEE in Wireless Communications and Networking Conference (WCNC), 2012, pp. 1710 - 1714. doi: 10.1109/WCNC.2012.6214059 https://doi.org/10.1109/WCNC.2012.6214059 | ||
| Appears in Collections |
One of the most rapidly expanding areas, nowadays, in networking systems is the Wireless Sensor Network (WSN). Typically WSNs rely on multi-hop routing protocols which must be able to establish communication among nodes and guarantee packet deliveries. In this paper, we present a novel approach for the implementation of the WSN routing protocols, which takes advantage of modern FPGAs in order to provide faster routing decisions while consuming significantly less energy than existing systems. Despite our focus on a particular routing protocol (GPSR), the platform developed has the additional advantage that due to the reconfigurability feature of the FPGA it can efficiently execute different routing protocols based on the requirements of the different WSN applications. As our real world experiments demonstrate, we accelerated the execution of the most widely used WSN routing protocol (GPSR) by at least 31 times when compared to the speed achieved when the exact same protocol is executed on a low power Intel Atom processor. More importantly by utilizing a high-end FPGA the overall energy consumption was reduced by more than 90%.
Copyright © DIAS 2013
