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Hardware task scheduling for partially reconfigurable FPGAs

Charitopoulos Georgios, Koidis Iosif, Papadimitriou Kyprianos, Pnevmatikatos Dionysios

Πλήρης Εγγραφή

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Περίληψη

Partial reconfiguration (PR) of FPGAs can be used to dynamicallyextend and adapt the functionality of computing systems, swapping in and outHW tasks. To coordinate the on-demand task execution, we propose andimplement a run time system manager for scheduling software (SW) tasks onavailable processor(s) and hardware (HW) tasks on any number ofreconfigurable regions of a partially reconfigurable FPGA. Fed with the initialpartitioning of the application into tasks, the corresponding task graph, and theavailable task mappings, the RTSM considers the runtime status of each taskand region, e.g. busy, idle, scheduled for reconfiguration/execution etc., toexecute tasks. Our RTSM supports task reuse and configuration prefetching tominimize reconfigurations, task movement among regions to efficiently managethe FPGA area, and RR reservation for future reconfiguration and execution.We validate its correctness using our RTSM to execute an image processingapplication on a ZedBoard platform. We also evaluate its features within asimulation framework, and find that despite the technology limitations, ourapproach can give promising results in terms of quality of scheduling.

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