Το έργο με τίτλο Least-squares iterative solution on a fixed-size VLSI architecture από τον/τους δημιουργό/ούς T. S. Papatheodorou, Papadopoulou Eleni διατίθεται με την άδεια Creative Commons Αναφορά Δημιουργού 4.0 Διεθνές
Βιβλιογραφική Αναφορά
Least Squares Iterative Solution on a Fixed Size VLSI Architecture , E.P. Papadopoulou, T.S. Papatheodorou, Springer Verlag Lecture Notes in Computer Science, Vol.297, pp. 914-925. May 2005
The VLSI implementation of the Accelerated Overrelaxation (AOR) method, when used for the accurate computation of the least-squares solutions of overdetermined systems, is the problem addressed here. As the size of this computational task is usually very large, we use space-time domain expansion techniques to partition the computation and map it onto a fixed size VLSI architecture.