Το work with title A reconfigurable perfect-hashing scheme for packet inspection by Pnevmatikatos Dionysios, Stephan Wong, Ioannis Sourdis, Vassiliadis, Stamatis is licensed under Creative Commons Attribution 4.0 International
Bibliographic Citation
I. Sourdis, D. Pnevmatikatos, S. Wong, S.Vassiliadis," A Reconfigurable perfect-hashing scheme for packet inspection,"in 2005 15th Intern. Conf. on Field Program. Logic and Applications (FPL), pp.644 - 647.doi:10.1109/FPL.2005.1515804
https://doi.org/10.1109/FPL.2005.1515804
In this paper, we consider scanning and analyzing packets in order to detect hazardous contents using pattern matching. We introduce a hardware perfect-hashing technique to access the memory that contains the matching patterns. A subsequent simple comparison between incoming data and memory output determines the match. We implement our scheme in reconfigurable hardware and show that we can achieve a throughput between 1.7 and 5.7 Gbps requiring only a few tens of FPGA memory blocks and 0.30 to 0.57 logic cells per matching character. We also show that our designs achieve at least 30% better efficiency compared to previous work, measured in throughput per area required per matching character.