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The memory structures of ATLAS I, a high performance, 16x16 ATM switch supporting backpressure

Kornaros, Georgios, Pnevmatikatos Dionysios, George Kalokerinos, Chara Xanthaki

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URIhttp://purl.tuc.gr/dl/dias/7DB9EB3F-8A2F-4A09-94BE-3D86386E207A-
Identifierhttp://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.48.7299&rep=rep1&type=pdf-
Languageen-
Extent5 pagesen
TitleThe memory structures of ATLAS I, a high performance, 16x16 ATM switch supporting backpressureen
CreatorKornaros, Georgiosen
CreatorPnevmatikatos Dionysiosen
CreatorΠνευματικατος Διονυσιοςel
CreatorGeorge Kalokerinosen
CreatorChara Xanthakien
Content SummaryWe present the overall structure of ATLAS I, emphasizing the memory use and requirements. We categorize these requirements in functionality and bandwidth and present the solutions we used in the first implementation of ATLAS I in a 0.35 􏰤CMOS technology. This implementation can serve as a starting point in the design of future switches with functionality similar to ATLAS I.en
Type of ItemΠλήρης Δημοσίευση σε Συνέδριοel
Type of ItemConference Full Paperen
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-10-19-
Date of Publication1998-
Bibliographic Citation D.Pnevmatikatos, G. Kornaros, G. Kalokerinos, C.Xanthaki.(1998).The Memory structures of ATLAS I, a high performance, 16x16 ATM switch supporting backpressure.Presented at 11th Annual 1998 IEEE International ASIC Conference.[online].Available: http://citeseerx.ist.psu.edu/viewdoc/download?doi=10.1.1.48.7299&rep=rep1&type=pdfen

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