Το έργο με τίτλο Explicit communication and synchronization in SARC από τον/τους δημιουργό/ούς Pnevmatikatos Dionysios, Katevenis, Manolis G, Vassilis Papaefstathiou, Stamatis G. Kavadias διατίθεται με την άδεια Creative Commons Αναφορά Δημιουργού 4.0 Διεθνές
Βιβλιογραφική Αναφορά
M. Katevenis, V. Papaefstathiou, S. G. Kavadias, D. N. Pnevmatikatos, F. Silla, D. S. Nikolopoulos, "Explicit ommunication and synchronization in SARC’’. IEEE Micro, vol. 30, no. 5, pp. 30-41, 2010.10.1109/MM.2010.77
https://doi.org/10.1109/MM.2010.77
A new network interface optimized for SARC supports synchronization and explicit communication and provides a robust mechanism for event responses. Full-system simulation of the authors' design achieved a 10- to 40-percent speed increase over traditional cache architectures on 64 cores, a two- to four-fold decrease in on-chip network traffic, and a three- to five-fold decrease in lock and barrier latency