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Design and performance evaluation of a programmable packet processing engine (PPE) suitable for high-speed network processors units

Pnevmatikatos Dionysios, Kyriakos Vlachos, Orphanoudakis, Th, Yannis Papaeftathiou, Nikolaos Nikolaou, George Konstantoulakis, J. A. Sanchez-P

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URI: http://purl.tuc.gr/dl/dias/DE3A0B19-A67B-4AA0-90CB-D56F1E1B6602
Έτος 2007
Τύπος Δημοσίευση σε Περιοδικό με Κριτές
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Βιβλιογραφική Αναφορά K.Vlachos, T. Orphanoudakis, Y. Papaeftathiou, N. Nikolaou, D.Pnevmatikatos, G. Konstantoulakis, J. A. Sanchez-P., "Design and performance evaluation of a programmable packet processing engine (PPE) suitable for high-speed network processors units ,"Micr. and Microsyst., vol. 31, no. 3, pp.188-199, 2007.doi:10.1016/j.micpro.2006.09.001 https://doi.org/10.1016/j.micpro.2006.09.001
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Περίληψη

In this paper, we present a Programmable Packet Processing Engine suitable for deep header processing in high-speed networking systems. The engine, which has been – fabricated as part of a complete network processor, consists of a typical RISC-CPU, whose register file has been modified in order to support efficient context switching, and two simple special-purpose processing units. The engine can be used in a number of network processing units (NPUs), as an alternative to the typical design practice of employing a large number of simple general purpose processors, or in any other embedded system designed to process mainly network protocols. To assess the performance of the engine, we have profiled typical networking applications and a series of experiments were carried out. Further, we have compared the performance of our processing engine to that of two widely used NPUs and show that our proposed packet-processing engine can run specific applications up to three times faster. Moreover, the engine is simpler to be fabricated, less complex in terms of hardware complexity, while it can still be very easily programmed.

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