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Modular fixed-size vlsi architectures for general multisplitting iteration.

Papadopoulou Eleni, Saridakis Ioannis

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URIhttp://purl.tuc.gr/dl/dias/891FEAF9-E48E-4E34-9FA0-800F14DF6564-
Identifierhttps://doi.org/10.1080/10637199508915530-
Languageen-
Extent14 pagesen
TitleModular fixed-size vlsi architectures for general multisplitting iteration.en
CreatorPapadopoulou Elenien
CreatorΠαπαδοπουλου Ελενηel
CreatorSaridakis Ioannisen
CreatorΣαριδακης Ιωαννηςel
Content SummaryMotivated by the inherent parallelicity of the Multisplitting Iterative Methods, we consider their application for the solution of Large Linear Systems. The realistic parallel implementation of this problem led us to the employment of fixed-size VLSI architectures. Considering the case of General Splitting matrices we combine known as well as we design new VLSI BLAS modules to form fixed-size architectures capable of efficiently carrying out the computations involved in an oversized multisplitting iteration step. For the factorization of the splitting matrices we employ the LU decomposition method while for the organization of the data streams we use space-time partitioning techniques. en
Type of ItemPeer-Reviewed Journal Publicationen
Type of ItemΔημοσίευση σε Περιοδικό με Κριτέςel
Licensehttp://creativecommons.org/licenses/by/4.0/en
Date of Item2015-10-16-
Date of Publication1995-
SubjectGreek mathematicsen
Subjectmathematics greeken
Subjectgreek mathematicsen
Bibliographic CitationE. P. Papadopoulou and Y. G. Saridakis, “Modular fixed-size VLSI arthitectures for general multisplitting iteration," Par. Algor. and Appl. ,vol.7, no.3-4 ,pp 177-191, 1995.doi:10.1080/10637199508915530en

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