Δημοσιεύσεις σε Περιοδικά

Μπορείτε να πλοηγηθείτε στη συλλογή της κοινότητας ή μπορείτε να χρησιμοποιήσετε την υπηρεσία αναζήτησης

Τελευταίες Υποβολές

	391-405 από 785 αποτελέσματα
391	P. Mattheakis, I. Papaefstathiou, "Significantly reducing MPI intercommunication latency and power overhead in both embedded and HPC systems," ACM Transactions on Architecture and Code Optimization, vol. 9, no. 4., Jan., 2013. doi: 10.1145/2400682.2400710	2015-11-16
392	I. Mavroidis, D. Mavroidis, I. Papaefstathiou, "Accelerating Emulation and Providing Full Chip Observability and Controllability," IEEE Design and Test, vol. 26, no. 6, pp. 84-94, Nov./Dec. 2009. doi: 10.1109/MDT.2009.136	2015-11-16
393	D. Simos, I. Papaefstathiou, M. Katevenis, "Towards Fabric-On-a-chip(FoC) : A 400Gbps 32×32 Variable-Packet-Size Buffered Crossbar (CICQ) Single-Chip Switch Core," IEEE Design and Test, to be published.	2015-11-16
394	I. Papaefstathiou, C. Manifavas. (2014). Evaluation of Micropayment Transaction Cost. Journal of Electronic Commerce Research.[Online]. Available: http://web.csulb.edu/journals/jecr/issues/20042/Paper3.pdf	2015-11-16
395	I. Papaefstathiou, A. Nikologiannis, B. Doshi, E. Grosse. (2004,Sept/Oct). Network Processors for Future High-End Systems and Applications. IEEE Micro. [Online]. Available: https://www.computer.org/csdl/mags/mi/2004/05/m5007.pdf	2015-11-16
396	I. Papaefstathiou, S. Perissakis, T. Orphanoudakis, N. Nikolaou, G. Kornaros, D. Pnevmatikatos, G. Konstantoulakis, N. Zervos, "PR03: a hybrid NPU architecture," IEEE Micro, vol. 24, no. 5, pp. 20 - 33, March, 2004. doi: 10.1109/MM.2004.55	2015-11-16
397	I. Papaefstathiou, K. Vlachos, V. Nikolaou, W. Lawrence, " Packet processing acceleration with a 3-stage re-configurable pipeline engine," IEEE Communications Letters, vol. 8, no. 3, Mar., 2004.	2015-11-16
398	I. Papaefstathiou, " Low-level Hardware Compression for Multi-Gigabit Networks," Journal of Circuits, Systems and Computers, vol. 13, no. 6, pp. 1307-1319, Dec. 2004. doi: 10.1142/S0218126604001969	2015-11-16
399	I. Papaefstathiou, "Titan II: an IPComp processor for 10Gbit/sec networks," IEEE Design and Test (DandT)., pp. 234 - 235, Nov. 2004. doi:10.1109/ISVLSI.2003.1183479	2015-11-16
400	I. Papaefstathiou, V. Papaefstathiou, C. Sotiriou, "Elsevier Journal on Microprocessors and Microsystems," vol. 28, no. 10, pp. 561-571, Sept. 2013. doi:10.1016/j.micpro.2004.08.009	2015-11-16
401	M. Christoulakis, A. Pitsiladis, P. Stergiopoulos, N. Moumoutzis, A. Moraiti, I. Maragoudakis and S. Christodoulakis, "Creative collaborative experiences with interactive shadow theater", Formazione & Insegnamento XII, vol. 2, 2014.	2015-11-15
402	D. Dochev, R. Pavlov, O. Hutter, I. Simonics and P. Arapi, "Virtual campuses - architectures and design solutions", Cybern. and Inform. Techn., vol. 4. no. 1, pp. 54-64, 2004.	2015-11-15
403	G. Stylianakis, N. Moumoutzis, P. Arapi, M. Mylonakis and S. Christodoulakis, "COLearn: supporting collaborative learning on top of existing learning infrastructures", Bulletin of the IEEE Technical Committee on Learning Technology, vol. 17, no. 1-2, April 2015.	2015-11-15
404	E.S. Sergaki, "An Hybrid Loss Minimization Controller inc to a ACIM speed FOC motor drive based on a General Loss Model and on a Fuzzy Logic Search Controller for Trans and Steady States", Journal of Power and Energy Systems, vol. 1, no. 3, Jan. 2009.	2015-11-14
405	E.S. Sergaki, N.M. Afentakis, G. Stavrakakis and D. Piromalis, "Methodology of Algorithm Implementation of a ACIM Standard Variable Speed FOC Motor Drive Incorporating an Efficiency Controller", The Online Journal on Power and Energy Engineering, vol. 2, no. 1, Oct. 2009.	2015-11-14
Pages: \|...22 \|23 \|24 \|25 \|26 \| 27 \|28 \|29 \|30 \|31 \|32 \|...