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Τελευταίες Υποβολές

 1981-1995 από 4303 αποτελέσματα
1981 I. Papaefstathiou, A. Nikitakis, "A Multi Gigabit FPGA-Based 5-tuple Classification System," in IEEE International Conference on Communications, 2008, pp. 2081 - 2085. doi: 10.1109/ICC.2008.3992015-11-15
1982 I. Papaefstathiou, A. Nikitakis, "A Memory-Efficient FPGA-based Classification Engine," in 16th International Symposium on Field-Programmable Custom Computing Machines, 2008, pp. 53 - 62. doi: 10.1109/FCCM.2008.292015-11-15
1983 I. Papaefstathiou, G.-G. Mplemenos, "MPLEM: An 80-processor FPGA Based Multiprocessor System," in International Symposium on Field-Programmable Custom Computing Machines, 2008, pp. 273 - 274. doi: 10.1109/FCCM.2008.152015-11-15
1984 I. Papaefstathiou, C. Manifavas, K. Theocharoulis, "Implementing Rainbow Tables in High-End FPGAs for Super-Fast Password Cracking," in 2010 International Conference on Field Programmable Logic and Applications, 2010, pp. 145 - 150. doi: 10.1109/FPL.2010.1202015-11-15
1985 E. Sotiriades, I. Papaefstathiou, A. Dollas, G. Chrysos, "A FPGA based coprocessor for gene finding using Interpolated Markov Model (IMM)," in International Conference on Field Programmable Logic and Applications, 2009, pp. 683 - 686. doi: 10.1109/FPL.2009.52723672015-11-15
1986 K. Papadimitriou, A. Dollas, I. Papaefstathiou, C. Effraimidis, "A self-reconfiguring architecture supporting multiple objective functions in genetic algorithms," in International Conference on Field Programmable Logic and Applications, 2009, pp. 453 - 456. doi: 10.1109/FPL.2009.52724822015-11-15
1987 M. Vavouras, K. Papadimitriou, I. Papaefstathiou, "Implementation of a genetic algorithm on a virtex-ii pro FPGA," in ACM/SIGDA international symposium on Field programmable gate arrays, 2009, pp. 287-287. doi: 10.1145/1508128.15082062015-11-15
1988 I. Papaefstathiou, I. Sotiropoulos, "A fast parallel matrix multiplication reconfigurable unit utilized in face recognitions systems," in International Conference on Field Programmable Logic and Applications, 2009, pp. 276 - 281. doi: 10.1109/FPL.2009.52722872015-11-15
1989 M. Vavouras, K. Papadimitriou, I. Papaefstathiou, "High-speed FPGA-based implementations of a Genetic Algorithm," in International Symposium on Systems, Architectures, Modeling, and Simulation, 2009, pp. 9 - 16. doi: 10.1109/ICSAMOS.2009.52892362015-11-15
1990 D. Kontos, I. Papaefstathiou, D. Pnevmatikatos, "Design space exploration of reconfigurable systems for calculating flying object's optimal noise reduction paths," in International Conference on Field Programmable Logic and Applications, 2009, pp. 282 - 287. doi: 10.1109/FPL.2009.52722882015-11-15
1991 M. Lakka, A. Desarti, G. Chrysos, E. Sotiriades, I. Papaefstathiou, A. Dollas, "Reconfigurable Computing IP Cores for Multiple Sequence Alignment," presented at International Conference on Bioinformatics Models, Methods and Algorithms, Rome, Italy, 2011.2015-11-15
1992 A. Nikitakis, I. Papaefstathiou, D. Bouris, "Fast and Efficient FPGA-Based Feature Detection Employing the SURF Algorithm," in 18th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines, 2010, pp. 3 - 10. doi: 10.1109/FCCM.2010.112015-11-15
1993 I. Papaefstathiou, D. Mprachos, C. Yannakou, D. Pnevmatikatos. (2007). Rapid System Prototyping of Networking Embedded Systems using System-C. Presented at Parallel and Distributed Computing and Systems. [Online]. Available: file:///C:/Users/%CE%94%CE%B7%CE%BC%CE%AE%CF%84%CF%81%CE%B7%CF%82/Downloads/paper229.pdf2015-11-15
1994 I. Papaefstathiou, D. Pnevmatikatos, I, Mavroidis, "Hardware Implementation of 2-Opt Local Search Algorithm for the Traveling Salesman Problem," in 18th IEEE/IFIP International Workshop on Rapid System Prototyping, 2007, pp. 41 - 47. doi: 10.1109/RSP.2007.242015-11-15
1995 D. Meidanis, I. Papaefstathiou I., "An efficient FPGA-based implementation of Pollard's (rho-1) factorization algorithm," in International Conference: Field-Programmable Technology, 2007. doi: 10.1109/FPT.2007.44392872015-11-15
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