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Technical University of Crete
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School of Electrical and Computer Engineering

Until June 2016, the School of Electrical and Computer Engineering was named School of Electronic and Computer Engineering.

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Last Submissions

 1066-1080 out of 4222 results
1066 Athanasios Topalis, "Information steganography using backscatter radio", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 20192019-09-09
1067 P.N. Alevizos and A. Bletsas, "Sensitive and nonlinear far-field RF energy harvesting in wireless communications," IEEE Trans. Wirel. Commun., vol. 17, no. 6, pp. 3670-3685, Jun. 2018. doi: 10.1109/TWC.2018.28128892019-09-09
1068 A. Nikolaou, M. Bucher, N. Makris, A. Papadopoulou, L. Chevas, G. Borghello, H.D. Koch, K. Kloukinas, T.S. Poikela and F. Faccio, "Extending a 65nm CMOS process design kit for high total ionizing dose effects," in 7th International Conference on Modern Circuits and Systems Technologies, 2018, pp. 1-4. doi: 10.1109/MOCAST.2018.83765612019-09-06
1069 S. Fotopoulos, P. Malakonakis, G. Chrysos and A. Dollas, "Streaming data correlation on GPUs," in 7th International Conference on Modern Circuits and Systems Technologies, 2018, pp. 1-5. doi: 10.1109/MOCAST.2018.83765882019-09-06
1070 M. Ouroutzoglou, A. Bletsas and G.N. Karystinos, "Intelligent noncoherent sequence equals coherent detection: Experimental proof in industrial RFID," in 7th International Conference on Modern Circuits and Systems Technologies, 2018, pp. 1-4. doi: 10.1109/MOCAST.2018.83766162019-09-06
1071 M. Bucher, A. Nikolaou, A. Papadopoulou, N. Makris, L. Chevas, G. Borghello, H.D. Koch and F. Faccio, "Total ionizing dose effects on analog performance of 65 nm bulk CMOS with enclosed-gate and standard layout," in IEEE International Conference on Microelectronic Test Structures, 2018, pp. 166-170. doi: 10.1109/ICMTS.2018.83837902019-09-06
1072 G. Vougioukas. A. Dimitriou, A. Bletsas and J. Sahalos, "Practical energy harvesting for batteryless ambient backscatter sensors," Electronics (Switzerland), vol. 7, no. 6, Jun. 2018. doi: 10.3390/electronics70600952019-09-05
1073 A. Brokalakis, N. Tampouratzis, A. Nikitakis, I. Papaefstathiou, S. Andrianakis, A. Dollas, M. Paracchini, M. Marcon, D.P. Pau and E. Plebani, "An open-source extendable, highly-accurate and security aware simulator for cloud applications," in 21st International Conference on Innovation in Clouds, 2018, pp. 1-3. doi: 10.1109/ICIN.2018.84015782019-09-05
1074 Konstantina Miteloudi, "Design and implementation of hardware architectures for pricing financial derivatives on reconfigurable logic", Master Thesis, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 20192019-09-03
1075 N. Giatrakos, A. Deligiannakis, M. Garofalakis, D. Keren and V. Samoladas, "Scalable approximate query tracking over highly distributed data streams with tunable accuracy guarantees," Inf. Syst., vol. 76, pp. 59-87, Jul. 2018. doi: 10.1016/j.is.2018.05.0012019-09-03
1076 N. Makris, F. Jazaeri, J.-M. Sallese, R.K. Sharma and M. Bucher, "Charge-based modeling of long-channel symmetric double-gate junction FETs-Part I: drain current and transconductances," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2744-2750, Jul. 2018. doi: 10.1109/TED.2018.28381012019-09-03
1077 P.N. Alevizos, K. Tountas and A. Bletsas, "Multistatic scatter radio sensor networks for extended coverage," IEEE Trans. Wirel. Commun., vol. 17, no. 7, pp. 4522-4535, Jul. 2018. doi: 10.1109/TWC.2018.28270342019-09-03
1078 Panagiotis Miliadis, "Performance landscape of CNN acceleration tools and resource constrained platforms", Diploma Work, School of Electrical and Computer Engineering, Technical University of Crete, Chania, Greece, 20192019-09-02
1079 F. Jazaeri, N. Makris, A. Saeidi. M. Bucher and J.-M. Sallese, "Charge-based model for junction FETs," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2694-2698, July 2018. doi: 10.1109/TED.2018.28309722019-09-02
1080 N. Makris, F. Jazaeri, J.-M. Sallese and M. Bucher, "Charge-based modeling of long-channel symmetric double-gate junction FETs-Part II: total charges and transcapacitances," IEEE Trans. Electron Devices, vol. 65, no. 7, pp. 2751-2756, July 2018. doi: 10.1109/TED.2018.28380902019-09-02
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